Zulhelmi, S.T., M. Sc.
Tentang Saya (About Me)
He was boren in 1979 in Gigieng Simpang Tiga, which is located in Pidie District Aceh. He received the B.E. degree from Syiah Kuala University, Banda Aceh, Indonesia in 2003, and the M.Sc degrees in electrical engineering from King Saud University, Riyadh Saudi Arabia in 2013.\nHe has been a Lecturer at Electrical Engineering department, Syiah Kuala University since 2003. His research interests include Electronic design, FPGAs architecture design, FPGAs implementation, VLSI architecture design, VLSI implementation and computer arithmetic.
Shuja A. Abbasi, Zulhelmi, Abdul Rahman M. Alamoud, 2015, FPGA design, simulation and prototyping of a high speed 32-bit pipeline multiplier based on Vedic mathematics, IEICE Electronics Express, 12, 1-12, 1349-2543.
Zulhelmi, 2013, FPGA Implementation of 16-bit Multipliers Based upon Vedic Mathematic Approach, Jurnal Rekayasa Elektrika, 10, 166-171, 1412-4785.
Zulhelmi Zakaria, and Shuja A. Abbasi, 2013, Optimized Multiplier based upon 6-Input Luts and Vedic Mathematics, World Academy of Science, Engineering and Technology, International Conference of Electrical Engineering and Communication Engineering, Dubai, United Arab Emirates, 30-31 January 2013, Dubai, United Arab Emirates, Waset.org, 884-888, 2010-3778.